As computing systems become ever smaller and faster, power lost due to leakage current and overall power use increases. Integrated circuit designers are increasingly attempting to raise chip performance but are limited by maximum power limits imposed at the system level. In general, the fastest components of an integrated circuit chip are forced to run faster and at higher voltages in order to achieve enhanced chip performance. Such increased voltages lead to greater current leakage and therefore to greater power consumption and overall greater power loss. Leakage has become dominant in designs due to scaling that even with selective voltage binning, (SVB), the fastest processes on a chip dominate the maximum power for the chip.